The invention relates to a method of manufacturing a semiconductor device comprising a dielectric layer in which contact holes are etched, after which electrically conductive plugs are formed in said contact holes by means of an electroless metallization bath, said plugs contacting a silicon-containing semiconductor material.
Semiconductor devices, in particular integrated circuits (ICs), comprise a large number of transistors and other components (capacitors, resistors) which are interconnected electrically. Metal-oxide semiconductor-field effect transistors (MOSFETs) are used on a large scale in VLSI (very large scale integration) devices. In this application, the source and drain regions of a silicon substrate are provided with metal contact plugs which are formed in etched contact holes in a thin SiO.sub.2 layer on the silicon substrate. By means of an aluminum conductor pattern which is provided by means of vacuum evaporation or sputtering the metal plugs and, hence, the individual transistors are interconnected. As the dimensions become smaller (submicron technology) sputtering or vacuum evaporation of, for example, aluminum is unsuitable for the metallization of contact holes. A suitable method is formed by electroless metallization, in which metal is selectively separated from an aqueous solution of metal ions and a reducing agent and deposited into the contact holes.
Such a method is known from U.S. Pat. No. 4,692,349. In the method described in patent specification, this substrates containing titanium silicide, tantalum silicide or cobalt silicide are coated with a dielectric layer. Holes are etched in the dielectric layer which are subsequently metallized in an electroless nickel or cobalt bath so as to form contact plugs. As stated in the said Patent Specification, said method is not suitable for the metallization of a silicon substrate because of the poor adhesion of nickel or cobalt to silicon.